The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure that provides multiple threshold voltages in a III-V compound semiconductor device and a method of forming such a semiconductor structure.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
One way of improving the performance of CMOS devices is to utilize high mobility semiconductor channel materials. For example, III-V compound semiconductor materials have been touted for future technology nodes owning to their high carrier mobility. To render III-V compound semiconductor materials compatible with conventional CMOS, III-V compound semiconductor materials are typically grown on a silicon substrate utilizing an aspect ratio trapping (ART) process.
Multiple threshold voltage CMOS devices are highly desired to achieve optimum of both power and performance. Back-gating is a viable approach to achieve multiple threshold voltage CMOS devices. However, conventional back-gating does not work for III-V compound semiconductor materials formed by ART due to the high leakage current caused by a highly defective region that is formed within a lower portion of a III-V compound semiconductor material that is formed utilizing ART. As such, there is a need for enabling a III-V device having multiple threshold voltages which avoids the leakage problem mentioned above.